There are many instances in the production and manufacture of electronic devices that a layer of material, such as present in one component, is required to be attached—often at specific locations—to a substrate, such as a wafer or die. In such instances, the integrity of the attachment, whether it is mechanically, thermally or electrically, can be critical for the performance of the device.
Examples include: attaching or bonding a flip-chip to an underlayer (a substrate such as a die); fine-pitch chip-on-flex technology as used in LCD manufacture; and wafer-level bumping for creating electrical contacts at a fine pitch. In all such applications, current technologies are experiencing significant limitations, due in part to the increasing demands for miniaturization of electronic devices.
use of “flip chip” technology is growing rapidly and the technology is currently used in devices such as mobile phones, MP3-players, smart cards, displays, computer peripherals. However, in terms of complexity and product cost, flip chip technology has drawbacks, due to the requirements of complex processes that involve bonding and connecting the flip chip to the die. These processes include solder flux coating, chip/board arranging, solder bump reflow processes, flux removal processes, underfilling, and cure processes.
The techniques used in bonding and connecting flip-chips are moving towards increasingly greater numbers of I/O contacts, and finer pitches between the contacts. See, for example, “Anisotropic Conductive Film for Flipchip Applications: An Introduction,” by Peter J. Opdahl, available at www.flipchips.com/tutorial05.html, incorporated herein by reference.
As an alternative to solder bumping, anisotropic conductive film (ACF) has emerged as a lead-free, environmentally-friendly, and flux-less bonding solution consisting of conductive particles dispersed in a polymer matrix, such as an adhesive resin. ACF works by trapping conductive particles between a conductive surface, such as a conductive bump on a flip chip, and another conductive surface, such as a conductive pad on a substrate corresponding to the conductive bump on the flip chip, while insulating adjacent particles from one another.
During the last few decades, ACF has been widely used for packaging technologies in the flat panel display industry to make electrical and mechanical connections from an integrated circuit driver to a glass substrate in a display. Lately, ACF has proven to be a popular alternative to other direct chip-attach technologies, in order to satisfy requirements of finer pitch at lower dimensions. For the ACF material this means making the conductive particles as small as possible, creating high particle density, and ensuring extremely evenly distributed particles within the ACF. In addition, the flow of the polymer matrix typically has to be as well-controlled as possible. Currently, particles as small as 3.5 μm in size are used in demanding applications.
It has long been recognized that ACF suffers from a number of limitations. If the particles are too large, or if there are too many particles, there is a risk of creating a short circuit between two neighboring bumps on the flip chip. This means that there are limitations on the minimum possible pitch between particles, since a short-circuit can arise if the particles are too close to each other. This is particularly evident in, e.g., the display industry, where black dots will appear when a short-circuit occurs. As there is no clear way of predicting with precision the uniformity of particle distribution within the polymer matrix, the risk of short-circuiting is always present. The impact of avoiding the risk of short-circuiting due to the particles is that the maximum possible number of contacts (I/O's) is limited, and thus the maximum possible pitch is limited when connecting a flip-chip using ACF.
Chip On Flex (COF), is a related technology that also utilizes ACF, and triggers similar issues to “flip-chip” technologies as the demand (particularly in the LCD industry) increases for finer pitch products (less than the 40-50 μm in current products) in order to meet cost and size requirements. There are two main issues in fine-pitch COF packaging that arise with the current bonding process: lead breakage and misalignment.
Since lead breakage during the assembly process can happen at any instance, and at any position, a visual inspection is almost impossible. Lead breakage can occur when there is a lack of trapped conductive particles between the two conductive surfaces; a trapped particle count less than one creates a high probability of an open electrical connection, which leads to electrical failure. In order to avoid that problem, the particle density must be increased, which is accomplished by reducing the diameter of the particles. If the lead pitch of the COF is 40 μm, an anisotropic conductive adhesive (ACA) with a particle diameter of less than 3 μm can be employed to achieve 99.95% chance of a good electrical connection (at least one trapped particle).
However, even at that high rate of connection integrity, the margin of error cannot be ignored. For example, for packages with 400 bumps, one out of five chips may have an open (disconnected) bump/lead joint. Moreover, if the magnitude of gap variation between bumps and leads exceeds 3 μm, an open joint failure can occur even with normal joints with trapped particles. Therefore, overall, the application of an anisotropic conducting adhesive (ACA) to fine-pitch COF interconnection requires reduced particle size and more accurate control of bump/lead height and chip/film coplanarity.
Misalignment also becomes a greater risk at finer lead pitches, since finer pitches require higher-precision control over the alignment between the film and the conductive surfaces. The existing tolerance requirement eventually needs to be replaced with a new standard for satisfactory yields. The causes of misalignment in the COF assembly process are various and may be in the film, chip, bonding equipment, and so on. The bonding tolerance relates to the nature of variation.
Thus, the main problems with ACF can be summed up as: (1) the need for uniform distributed particle size; (2) the need for control of bonding pressure to break the surface coatings of the particles and to create contacts; (3) limitations in size of the particles with respect to distribution of particles—one cannot go down to sub micron level; and (4) manufacturing limitations—one cannot manufacture at the sub micron level with good and reproducible uniformity. Accordingly, there is a need for a better way of making connections between a chip and a substrate and of attaching a chip to a substrate.
Wafer-level bumping is subject to similar considerations. The need for “bumps” for creation of the electrical contacts through distribution or contact channels with lower dimension and finer pitch demands ever greater fidelity of manufacture. Electrical connections are created by bumps, but there are limitations in the size of those bumps; it is not possible to go down to sub micron level with current manufacturing processes, which are constrained in the number of bumps per unit area. Thus, a number of distribution channels are suffering from the constraints of creating the bumps.
The discussion of the background herein is included to explain the context of the technology. This is not to be taken as an admission that any of the material referred to was published, known, or part of the common general knowledge as at the priority date of any of the claims found appended hereto.
Throughout the description and claims of the specification the word “comprise” and variations thereof, such as “comprising” and “comprises”, is not intended to exclude other additives, components, integers or steps.